Publications

Journal papers

1)   Z. Ghaderi, S.G. Miremadi, H. Asadi, and M. Fazeli, "HAFTA: Highly Available Fault-Tolerant Architecture to Protect SRAM-Based Reconfigurable Devices against Multiple Bit Upsets", accepted for publication in the IEEE  Transactions on Device and Materials Reliability (TDMR), 2013.

2)  M. Ebrahimi, S.G. Miremadi, H. Asadi, and M. Fazeli,"A Low Cost Scan Chain-Based Technique to Recover Multiple Errors in TMR Systems", accepted for publication in the IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2013.

3)  M. Fazeli, A. Namazi, S. G. Miremadi, A. Haghdoost, ''Operand Width Aware Hardware Reuse: A Low Cost Approach to Resilient ALU design in Embedded Processors'', to appear in Elsevier Journal of Microelectronics Reliability.

4) H. Asadi, M. Baradaran, M. Fazeli, S. G. Miremadi, ''Efficient Algorithms to Accurately Compute Logic-Electrical-Timing Derating (LETD) of Digital Circuits'', to appear in Elsevier Journal of Microelectronics Reliability.

5) Y. Sedaghat, S. G. Miremadi, "An FSM-Based Monitoring Technique to Differentiate Between Follow-up and Original Errors in Safety-Critical Distributed Embedded Systems", in the Elsevier Journal of Microelectronic Engineering, Vol. 42, Issue 6, pp.863-873, Apr. 2011.

6) Y. Sedaghat, S. G. Miremadi, "Classification of Activated Faults in the FlexRay-Based Networks", in the Springer Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 26, Issue 5, 2010.

7) A. Patooghy, S. G. Miremadi, "Complement Routing: A Methodology to Design Reliable Routing Algorithm for Network on Chips", in the Elsevier Journal of Microprocessors and Microsystems, Vol. 34, Issue 6, pp. 163-173, Oct. 2010.

8) A. Patooghy, S. G. Miremadi, M. Fazeli, "A Low-Over & Reliable Switch Architecture for Network-on-Chips", in the Elsevier Journal of Integration The VLSI, Vol. 43, Issue 3, pp. 268-278, Jun. 2010.

9) M. Fazeli, A. Namazi, S. G. Miremadi, "Robust Register Caching: An Energy Efficient Circuit Level Technique to Protect Register File in Embedded Processors", in the IEEE Transaction on Device and Material Reliability (TDMR).

10) M. Fazeli, S. G. Miremadi, A. Ejlali, A. Patooghy, "A Low Energy SEU/SET-Tolerant Latch for Deep Sub Micron Technologies", in IET (IEE) Journal of Computers & Digital Techniques, Vol. 3, Issue 3, pp. 289-303, 2009.

11) A. Ejlali, B.M. Al-Hashimi, P. Rosinger, S. G. Miremadi, L. Benini, "Performability/Energy Trade-off in Error-Control Schemes for On-Chip Networks", in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008.

12) A. Ejlali, S. G. Miremadi, "Error Propagation Analysis Using FPGA-based SEU-Fault Injection", in the Elsevier Journal of Microelectronic Engineering, Vol. 48, Issue 2, Feb. 2008.

13) M. Fazeli, R. Farivar, S. G. Miremadi, "Error Detection Enhancement in PowerPC Architecture-based Embedded Processors, " in the Springer Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 24, Issue 3, Jun. 2008.

14) H. R. Zarandi, S. G. Miremadi, "Hierarchical Set-Associative Cache for High-Performance and Low-Energy Applications, " in the World Scientific Journal of Computers, Systems and Circuits (JCSC), Vol. 14, Issue 6, 2006.

15) A. Ejlali, S. G. Miremadi, "Emulating Switch-Level Models of CMOS Circuits", in the Elsevier Journal of Microelectronic Engineering, Vol. 84, Issue 2, Feb. 2007.

16) G. Asadi, S. G. Miremadi, A. Ejlali, "Fast Co-Verification of HDL Models", in the Elsevier Journal of Microelectronic Engineering, Vol. 84, Issue 2, Feb. 2007.

17) H. R. Zarandi, S. G. Miremadi, "A SEU-Protected Cache Memory Based on Variable Associativity of Sets", in the Elsevier Journal of Reliability Engineering and System Safety, Vol. 92, Issue 11, Nov. 2007.

18) H. R. Zarandi, S. G. Miremadi, "Dependability evaluation of Altera FPGA-based embedded systems subjected to SEUs, " in the Elsevier Journal of Microelectronics and Reliability, Vol. 47, Issue 3, Mar. 2007.

19) A. Rajabzadeh, S. G. Miremadi, "CFCET: A Hardware-Based Control Flow Checking Technique in COTS Processors Using Execution Tracing", in the Elsevier Journal of Microelectronics and Reliability, Vol. 46, Issues 5-6, May-Jun. 2006.

20) A. Ejlali, B.M. Al-Hashimi, M. Schmitz, P. Rosinger, S. G. Miremadi, "Combined Time and Information Redundancy for SEU-Tolerance in Energy-Efficient Real-Time Systems", in the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14, Issue 4, Apr. 2006.

21) H. R. Zarandi, S. G. Miremadi, "A Fault-Tolerant Cache Architecture based on Binary Set Partitioning", in the Elsevier Journal of Microelectronics Reliability, Vol. 46, Issue 1, Jan. 2006.

22) A. Rajabzadeh, S. G. Miremadi, "Transient Detection in COTS Processor Using Software Approach", in the Elsevier Journal of Microelectronics Reliability, Vol. 46, No. 1, Jan. 2005.

23) A. Rajabzadeh, S. G. Miremadi, M. Mohandespour, "Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features", in the Journal of Electronic Testing: Theory and Applications (JETTA), Kluwer Academic Publishers, Vol. 20, Issue 5, Oct. 2004.

24) A. R. Ejlali, and S. G. Miremadi, "FPGA-Based Fault Injection into Switch-Level Models", in the Elsevier Journal of Microprocessors and Microsystems, Vol. 28, Issue 5-6, Aug. 2004.

25) A. R. Ejlali, and S. G. Miremadi, "FPGA-based Monte Carlo Simulation for Fault Tree Analysis", in the Elsevier Journal of Microelectronics Reliability, Vol. 44, Issue 6, Jun. 2004.

Conference papers

1) H. Farbeh, M. Fazeli, F. Khosravi,  S. G. Miremadi, "Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors", the 9th European Dependable Computing Conference (EDCC 2012), Sibiu, Romania, May 2012.

2) S. N. Ahmadian, M.Fazeli, N. Farhadi, S. G. Miremadi, "Value Aware Low Power Register File Architecture, Proceedings of 16th symposium on Computer Architecture and Digital Systems (CADS2012), Shiraz, Iran, May 2012 (Best Paper Award).

3) M. A. Abazari, M. Fazeli, A. Patooghy, S.G. Miremadi, "An Efficient Technique to Tolerate MBU Faults in Register File of Embedded Processors", Proceedings of 16th symposium on Computer Architecture and Digital Systems (CADS2012), Shiraz, Iran, May 2012.

4) A. Mohammadi, M. Ebrahimi, A. Ejlali, S.G. Miremadi, " SCFIT: A FPGA-based Fault InjectionTechnique for SEU Fault Model", In the proceedings of Design, Automation and Test in Europe Conference (DATE'12), Dresden, Germany, March, 2012.

5) N. Farhady Ghalaty, M. Fazeli, H. IzadyRad, S. G. Miremadi, "Software-Based Control Flow Error Detection and Correction Using Branch Triplication", the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), Athens, Greece, July 2011.

6) M. Shafaei, A. Patooghy, S. G. Miremadi, "Crosstalk Avoidance in NoC Channels Using Numeral-Based Data Coding", the 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2011), Hong Kong, China, October 2011.

7) F. Khosravi, H. Farbeh, M. Fazeli, S. G. Miremadi, "Low Cost Concurrent Error Detection for On-Chip Memory Based Embedded Processors", the 9th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2011), Melbourne, Australia, October 2011.

8) M. Shafaei, A. Patooghy, S. G. Miremadi, "Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design", the 14th Euromicro Conference on Digital System Design (DSD 2011), Oulu, Finland, August/September 2011.

9) Y. Sedaghat, Z. Jalali, S. G. Miremadi, "A Fault Tolerance Study for the Central Bus Guardian in the FlexRay Protocol", the 20th IEEE International Symposium on Industrial Electronics (ISIE 2011), Gdansk, Poland, June 2011.

10) M. Ebrahimi, S. G. Miremadi, H. Asadi, "ScTMR: A Scan Chain-Based Error Recovery Technique for TMR Systems in Safety-Critical Applications", the IEEE/ACM International Conference on Design Automation and Test in Europe (DATE 2011), Grenoble, France, March 2011.

11) M. Fazeli, S. N. Ahmadian, S. G. Miremadi, H. Asadi, M. B. Tahoori, "Soft Error Rate Estimation of Digital Circuits in the Presence of Multiple Event Transients (METs) ", the IEEE/ACM International Conference on Design Automation and Test in Europe (DATE 2011), Grenoble, France, March 2011.

12 ) S.N. Ahmadyan, S.G. Miremadi, "Fault Injection In Mixed-Signal Environment Using Behavioral Fault Modeling in Verilog-A",  IEEE International Behavioral Modeling and Simulation Conference, San-Diego, U.S.A, 2010.

13)  A. Patooghy, M. Shafaei, S. G. Miremadi, "FiRot: An Efficient Crosstalk Mitigation Method for Network-on-Chips", the 16th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2010), Tokyo, Japan, December 2010.

14) A. Patooghy, S. G. Miremadi, M. Shafaei, "Crosstalk Modeling to Predict Channel Delay in Network-on-Chips", the 28th IEEE International Conference on Computer Design (ICCD 2010), Amsterdam, the Netherland, October 2010.

15) Z. Shirmohammadi, M. Jalal, A. Patooghy, S. G. Miremadi, "A Reconfigurable Switch Architecture to Enhance Reliability of Network-on-Chips", the International Conference on Real-Time and Embedded Systems (RTES 2010), Singapore, November 2010.

16) M. Jalal, Z. Shirmohammadi, A. Patooghy, S. G. Miremadi, "Evaluation of Application Mapping for Network-on-Chips", the International Conference on Real-Time and Embedded Systems (RTES 2010), Singapore, November 2010.

17) M. Fazeli, S. G. Miremadi, H. Asadi, S. N. Ahmadian, "A Fast and Accurate Multi-Cycle Soft Error Rate Estimation Approach to Resilient Embedded Systems Design", the 40th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2010), Chicago, USA, June-July 2010.

18) A. Patooghy, H. Tabkhi, S. G. Miremadi, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", the 13th Euromicro Conference on Digital System Design (DSD 2010), Lille, France, September 2010.

19) M. Fazeli, S. G. Miremadi, H. Asadi, M. Baradaran Tahoori, "A Fast Analytical Approach to Multi-Cycle Soft Error Rate Estimation of Sequential Circuits", the 13th Euromicro Conference on Digital System Design (DSD 2010), Lille, France, September 2010.

20) A. Patooghy, H. Tabkhi, S. G. Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", the 3rd International Conference on Dependability (DEPEND 2010), Venice, Italy, 18-25 July.

21) M. Bashiri, S. G. Miremadi, "Performability Comparison of Schedulability Conditions in Real-Time Embedded Systems", the 3rd International Conference on Dependability (DEPEND 2010), Venice, Italy, 18-25 July.

22) M. Bashiri, S. G. Miremadi, "Investigating the Effects of Schedulability Conditions on the Power Efficiency of Task Scheduling in an Embedded System", the 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC 2010), 5-6 May 2010, Spain.

23) M. Fazeli, A. Namazi, S. G. Miremadi, "An Energy Efficient Circuit Level Technique to protect Register File from MBUs and SETs in Embedded Processors", the 39th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2009), Lisbon, Portugal, 29 June - 2 July 2009.

24) M. H. Razmkhah, S. G. Miremadi, A. Ejlali, M. Fazeli, "A Novel SET/SEU Hardened Parallel I/O Port", IEEE Circuits and Systems International Conference on Testing and Diagnosis (ICTD 2009), Chengdu, Sichuan China, 28-29 April 2009.

25) Hassan. Ghasemzadeh, S. G. Miremadi, A. Ejlali, "Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors", the 15th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2009), Shanghai, China, 16-18 November 2009.

26) A. Patooghy, S. G. Miremadi, "Reliability & Performance Modeling to Speed-Up the NoC Design", the 15th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2009), Shanghai, China, 16-18 November 2009.

27) Y. Sedaghat, S.G. Miremadi, "A Low-Cost On-Line Monitoring Mechanism for the FlexRay Communication Protocol", the Fourth Latin-American Symposium on Dependable Computing (LADC 2009), Joao Pessoa, Brazil, 1- 4 September 2009.

28) Y. Sedaghat, S.G. Miremadi, "Categorizing and Analysis of Activated Faults in the FlexRay Communication Controller Registers", the 14th European Test Symposium (ETS 2009), Seville, Spain, 25-29 May 2009.

29) A. Namazi, Y. Sedaghat, S.G. Miremadi, A. Ejlali, "A Low-Cost Fault-Tolerant Technique for Carry Look-Ahead Adder", the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), Sesimbra-Lisbon, Portugal, 24-27 June 2009.

30) Y. Sedaghat, Z. Jalali, H. Jamalifar, S.G. Miremadi, A. Ejlali, "Fault Tolerance Analysis and Evaluation of Central Bus Guardian in the FlexRay Communication Protocol Used in Modern Automotive Electronic Control Systems", the 2nd Annual International Conference on Automotive Electronics Industry (AEC 2009), Tehran, Iran, 4-5 February 2009, (in Persian).

31) S. M. H. Shekarian, A. Ejlali, S.G. Miremadi, "Low Power Error Detection Mechanisms for Automotive Applications", the 2nd Annual International Conference on Automotive Electronics Industry (AEC 2009), Tehran, Iran, 4-5 February 2009, (in Persian).

32) M. Manoochehri, A. Ejlali, S. G. Miremadi, "Joint Write Policy and Fault-Tolerance Mechanism Selection for Caches in DSM Technologies: Energy-Reliability Trade-off", the 10th IEEE International Symposium on Quality Electronic Design (ISQED 2009).

33) M. Manoochehri, A. Ejlali, S. G. Miremadi, "Fault Tolerant and Low Energy Write Back Heterogeneous Set Associative Cache for DSM Technologies", the 4th IEEE International Conference on Availability, Reliability and Security (ARES 2009).

34) M. H. Razmkhah, S. G. Miremadi, A. Ejlali, "A Micro-FT-UART for Safety-Critical SoC-Based Applications", the 4th International Conference on Availability, Reliability and Security (ARES 2009), Fukuoka, Japan, March 2009.

35) A. Patooghy, S. G. Miremadi, "XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip", the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2009), Weimar, Germany, January 2009.

36) H. Ghasemzadeh, H. Tabkhi, S. G. Miremadi, A. Ejlali, "A Cost-Effective Error Detection and Roll-back Recovery Technique for Embedded Microprocessor Control Logic", the 20th International Conference on Microelectronics (ICM 2008), Sharjeh, UMA.

37) A. Patooghy, S.G. Miremadi, "A Low-Overhead and Reliable Routing Algorithm for Network on Chips", the International SoC Design Conference (ISOCC 2008), Busan, Korea, November 24-25, 2008.

38) M. Fazeli, S.G. Miremadi, A. Patooghy, "the Interplay of Reliability and Power Consumption in Design of SEU-Tolerant Latches for DSM Technology", the 6th IEEE East-West Design & Test Symposium (EWDTS 2008), Lviv, Ukraine, 9-13 October 2008.

39) M. Fazeli, A. Patooghy, S.G. Miremadi, "Evaluation of a Concurrent Error Detection Technique Using Power Supply Disturbance Fault Injection", the 6th IEEE East-West Design & Test Symposium (EWDTS 2008), Lviv, Ukraine, 9-13 October 2008.

40) M. Fazeli, S. A. Ahmadian, S.G. Miremadi, "A Low Energy Soft Error-Tolerant Architecture for Register File in Embedded Processors", 11th IEEE High Assurance Systems Engineering Symposium, (HASE 2008), Nanjing, China, 2008.

41) S. M. H. Shekarian, A. Ejlali, S. G. Miremadi, "A Low Power Error Detection Technique for Floating-Point Units in Embedded Applications", the International Conference on Embedded and Ubiquitous Computing (EUC 2008), Shanghai, China, 17-20 December 2008.

42) M. Jafari-Nodoushan, S. G. Miremadi, A. Ejlali, "Control-Flow Checking Using Branch Instructions", the International Conference on Embedded and Ubiquitous Computing (EUC 2008), Shanghai, China, 17-20 December 2008.

43) H. Tabkhi, S.G. Miremadi, A. Ejlali, "An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors", the 23th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2008).

44) M. Fazeli, S.G. Miremadi, "A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SETs", the 23th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2008).

45) Y. Sedaghat, and S.G. Miremadi, "Investigation and Reduction of Fault Sensitivity in the FlexRay Communication Controller Registers", the 27th International Conference on Computer Safety, Reliability and Security (SAFECOMP 2008), Newcastle upon Tyne, UK, 22-25 September 2008.

46) N. Mehdizadeh, M. Shokrolah-Shirazi, S. G. Miremadi, "Analyzing Fault Effects in 32-bit OpenRISC 1200 Microprocessor", the 3rd International conference on availability, reliability and security (ARES 2008), Barcelona, Spain, May 2008.

47) N. Farazmand, M. Fazeli, S. G. Miremadi, "FEDC: Control Flow Error Detection and Correction for Embedded Systems without Program Interruption", the 3rd International conference on availability, reliability and security (ARES 2008), Barcelona, Spain, May 2008.

49) M. Dehbashi, V. Lari, S. G. Miremadi, M. Shokrolah-Shirazi"Fault Effects in FlexRay-Based Networks with Hybrid Topology", the 3rd International conference on availability, reliability and security (ARES 2008), Barcelona, Spain, May 2008.

50) M. Amiri-Kamalabad, S. G. Miremadi, M. Fazeli, "A Power Efficient Approach to Fault-Tolerant Register File Design", the 21st IEEE International Conference on VLSI Design (VLSI Design 2008), HICC, Hyderabad, India, 4-8 January 2008.

51) M. Shokrolah-Shirazi, N. Mahdizadeh, S. G. Miremadi, "FPGA-based Fault Injection into Synthesizable Verilog HDL Models", the 2nd IEEE International conference on Secure System Integration and Reliability Improvement, (SSIRI 2008), Yokohama, Japan, July 2008.

52) A. Patooghy, M. Fazeli, S. G. Miremadi, "A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips" the 13th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2007), Melbourne, Australia, 2007.

53) V. Lari, M. Dehbashi, S. G. Miremadi, N. Farazmand, "Assessment of Message Missing Failures in FlexRay-Based Networks", the 13th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2007), Melbourne, Australia, 2007.

54) V. Lari, M. Dehbashi, S. G. Miremadi, M. Amiri, "Evaluation of Babbling Idiot Failures in FlexRay-Based Networks", the 7th IFAC/IEEE International Conference on Fieldbuses & Networks in Industrial & Embedded Systems (FET 2007), Toulouse, France, 2007.

55) A. Patooghy, M. Fazeli, S. G. Miremadi, "Reducing Power Consumption in NoC Design with no Effect on Performance and Reliability", the 14th IEEE International Conference on Electronics, Circuits and Systems, (ICECS 2007).

56) M. Mirzaaghatabar, B. Jafarpour, S.G. Miremadi, H. Pedram, J. Ajorlou, "FTARM: Fault Tolerant Asynchronous RISC Microprocessor Using Watchdog Module", the 5th IEEE East-West Design & Test Symposium (EWDTS 2007), Armenia.

57) M. Fazeli, A. Patooghy, S. Gh. Miremadi, A. Ejlali, "Feedback Redundancy: A Power-Aware SEU-Tolerant Latch Design in DSM Technologies", the 37th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2007), Edinburg, UK, 25-28 June 2007.

58) H. R. Zarandi, S. G. Miremadi C. Argyrides, D. K. Pradhan, "Multiple SEU Tolerance in LUTs of FPGAs Using Protected Schemes", the 12th IEEE European Test Symposium (ETS), Germany, 2007.

59) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, J. Mathew, "Soft Error Mitigation in Switch Modules of SRAM-based FPGAs", the IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27-30 May 2007.

60) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, J. Mathew, "CAD-Directed SEU Susceptibility Reduction in FPGA Circuit Designs", the IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27-30 May 2007.

61) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, C. Argyrides, "CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs", the IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27-30 May 2007.

62) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, C. Argyrides, "Exploiting Unused Routing Resources of Switch Modules to Tolerate SEUs in SRAM-based FPGAs", the IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27-30 May 2007.

63) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, J. Mathew, "SEU-Mitigation Placement and Routing Algorithms and Their Impact in SRAM-based FPGAs", the IEEE International Symposium on Quality Electronic Design (ISQED 2007), San Jose, CA, 2007.

64) H. R. Zarandi, S. G. Miremadi, D. K. Pradhan, C. Argyrides, "Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs", the 14th IEEE Reconfigurable Architecture Workshop, in conjunction with IPDPS, California, USA, 2007.

65) N. Amini, M. Fazeli, S. G. Miremadi, M. T. Manzuri, "Distance-Based Segmentation: An Energy-Efficient Clustering Hierarchy for Wireless Microsensor Networks", the 5th Annual Conference on Communication Networks and Services Research (CNSR 2007), Fredericton, New Brunswick, Canada, May 2007.

66) N. Amini, M. Fazeli, S. G. Miremadi, "A Hierarchical Routing Protocol for Energy Load Balancing in Wireless Sensor Networks", the 20th IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE07), Vancouver, Canada, April 2007.

67) M. Shaad Zolpirani, M. M. Bidmeshki, S. G. Miremadi, "the Effect of Routing-Update Time on Networks Performability", the 5th ACS/IEEE International Conference on Computer Systems and Applications ( AICCSA 2007), Amman, Jordan, 13-16 May, 2007.

68) A. Ejlali, B.M. Al-Hashimi, P. Rosinger, S.G. Miremadi, "Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in On-Chip Networks", the IEEE/ACM Design, Automation, and Test in Europe conference (DATE 2007).

69) H. Beitollahi, S.G. Miremadi, G. Deconinck, "Fault-Tolerant Earliest-Deadline-First Scheduling Algorithm", the 21st IEEE International Parallel & Distributed Processing Symposium, March 2007, (IPDPS 2007).

70) M. Mirzaaghatabar, S.G. Miremadi, H. Pedram, "Fault Tolerance in a RISC Asynchronous Processor Using Flow Graph Checking", the 12th CSI Computer Conference, Feb. 2007, Iran (CSICC 2007).

71) M. Shaad Zolpirani, M. M. Bidmeshki, S. G. Miremadi., "Improving the Performability of Networks Using Parallel Processing, " the 6th IEEE International Conference on Networking (ICN 2007), Martinique, French Caribbean, 22-28 April 2007.

72) A.Vahdatpour, M. Fazeli, S. G. Miremadi, "Experimental Evaluation of Three Concurrent Error Detection Mechanisms", the 18th IEEE International Conference on Microelectronics (ICM 2006), Dhahran, Saudi Arabia, 16-19 December 2006.

73) M. Bashiri, M. Fazeli, S. G. Miremadi, "A Checkpointing Technique for Rollback Error Recovery in Embedded Systems ", the 18th IEEE International Conference on Microelectronics (ICM 2006), Dhahran, Saudi Arabia, 16-19 December 2006.

74) M. M. Bidmeshki, M. Shaad Zolpirani, S. G. Miremadi., "Performability Estimation of Network Services in the Presence of Component Failure", the 2nd International Conference on Telecommunications and Networking (TeNe 2006), December 2006.

75) M. Kefayati , H.R. Rabiee , S. G. Miremadi , A. Khonsari, "Misbehavior Resilient Multi-path Data Transmission in Mobile Ad-hoc Networks", 4th ACM Workshop on Security of Ad Hoc and Sensor Networks, Alexandria, Virginia, USA, October 2006.

76) Y. Sedaghat, S. Hessabi, S. G. Miremadi, "A Flood-Based Routing Algorithm to Increase the Performance of NoCs" the 11th International CSI Computer Conference (CSICC 2006), Tehran, Iran, Jan. 2006. (In Persian)

77) Y. Sedaghat, S. Hessabi, S. G. Miremadi, M. Shaad Zolpirani, "A Method to Improve the Performability of NOC Using Dual Source-Router Conjunction", the 11th International CSI Computer Conference (CSICC 2006), Tehran, Iran, January 2006. (In Persian)

78) M. Modarressi, H. Javan-Hemmat, S.G. Miremadi, S. Hessabi, M. Najafvand, M. Goudarzi, M. Mohamadzade, " A Fault-Tolerant Approach to Embedded System Design Using Software Standby Sparing" the 11th International CSI Computer Conference (CSICC 2006), Tehran, Iran, January 2006. (In Persian)

79) A. Vahdatpour, M. Fazeli, S. G. Miremadi, "Transient Error Detection in Embedded Systems Using Reconfigurable Components", the IEEE Symposium on Industrial Embedded Systems (IES 2006), Antibes Juan-Les-Pins, France, 18-20 October 2006.

80) Y. Sedaghat, S. G. Miremadi, M. Fazeli, "A Software-Based Error Detection Technique Using Encoded Signatures", the 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2006), Arlington/Washington DC, 4-6 October 2006.

81) A. Patooghy, S. G. Miremadi, A. Javadtalab, M. Fazeli, N. Farazmand, "A Solution to Single Point of Failure Using Voter Replication and Disagreement Detection", the 2nd IEEE International Symposium on Dependable, Autonomic and Secure Computing (DASC 2006), Indiana University, Purdue University, Indianapolis, USA 29 September - 1 October 2006.

82) S. Aliari-Zonouz, S. G. Miremadi, "A Fuzzy-Monte Carlo Simulation Approach for Fault Tree Analysis", the 52nd Annual Reliability and Maintainability Symposium, (RAMS 2006), Newport Beach, CA, USA, January 2006.

83) S. S. Miremadi, M. Fazeli, A. Patooghy, S. G. Miremadi "Performance Evaluation of a Routing Protocol for Wireless Sensor Networks", the 3rd IEEE/IFIP International Conference on wireless and Optical communications Networks (WOCN 2006), Bangalore, India.

84) M. Fazeli, R. Farivar, S. G. Miremadi, "A Software-Based Concurrent Error Detection Technique for PowerPC Processor-based Embedded systems", the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT), Monterey, California, 2005.

85) M. Fazeli, R. Farivar, S. Hessabi, S. G. Miremadi, "A Fault Tolerant Approach to Object Oriented Design and Synthesis of Embedded Systems", the 2nd Latin-American Symposium on Dependable Computing (LADC 2005), Springer-Verlag LNCS Series, Salvador, Brazil, 25-28 October 2005.

86) A. Bakhoda, S. G. Miremadi, H. R. Zarandi, "Investigation of Transient Effects on FPGA-based Embedded Systems", the 2nd International Conference on Embedded Software and Systems (ICESS 2005), IEEE-CS Press, Xian, China, 16-18 December 2005.

87) A. Bakhoda, S. G. Miremadi, H. R. Zarandi, "Experimental Evaluation of Transient Effects on SRAM-based FPGA Chips, " the 17th IEEE International Conference on Microelectronics (ICM 2005), Islamabad, Pakistan, 13-15 December 2005.

88) H. Salmani, S. G. Miremadi, "Contribution of Controller Area Networks Controller to Masquerade Failures", the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2005), Changsha, Hunan, China, 12-14 December 2005.

89) A. Rajabzadeh, S. G. Miremadi, "A Hardware Approach to Concurrent Error Detection Capability Enhancement in COTS Processors", the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2005), Changsha, Hunan, China, 12-14 December 2005.

90) H. R. Zarandi, S. G. Miremadi, "Soft Error Mitigation in Cache Memories of Embedded Systems By Means of a Protected Scheme", the 2nd Latin-American Symposium on Dependable Computing (LADC 2005), Springer-Verlag LNCS Series, Salvador, Brazil, 25-28 October 2005.

91) R. Farivar, M. Fazeli, S. G. Miremadi, "Directed Flooding: A Fault-Tolerant Routing Protocol for Wireless Sensor Networks", the International Conference on Sensor Networks, Montreal, Canada, August 2005.

92) A. Ejlali, M. Schmitz, B. M. Al-Hashimi, S. G. Miremadi, P. Rosinger, "Energy Efficient SEU-Tolerance in DVS-Enabled Real-Time Systems through Information Redundancy", the International Symposium on Low Power Electronics and Design (ISLPED 2005) , San Diego, California, USA.

93) A. Ejlali, B. M. Al-Hashimi, S. G. Miremadi, "Fast Observation Architecture for FPGA-based SEU Analysis", the European Test Symposium, (ETS 2005)

94) S. G. Miremadi, H. R. Zarandi, "Reliability of Protecting Techniques Used in Fault-Tolerant Cache Memories", the 18th IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE), Saskatoon, Canada, May 2005.

95) H. R. Zarandi, S. G. Miremadi, "Hierarchical Multiple Associative Mapping in Cache Memories", the 12th IEEE International Conference on Engineering of Computer-Based Systems (ECBS), Maryland, USA, April 2005.

96) H. Beitollahi, S. G. Miremadi, "A Fault Tolerant Static Scheduling Algorithm for Real-Time Multiprocessor Systems", the 13th International Conference on Real-Time Systems, Paris, France, April 2005.

97) H. Beitollahi, S. G. Miremadi, J. Habibi, "Performance Evaluation of Fault-Tolerant Scheduling Algorithms in Real-Time Multiprocessor Systems", the 10th CSI Computer Conference (CSICC), ITRC, February 2005.

98) S. Timarchi, S. G. Miremadi, A. Ejlali, "Analysis of Some Random Number Generators with Exponential Density Distribution Function, " the 10th CSI Computer Conference (CSICC), ITRC, February 2005 [in Persian].

99) S. Timarchi, S. G. Miremadi, A. Ejlali, " A Comparative Evaluation of Some Hardware-Based Pseudo-Random Number Generators" the 10th CSI Computer Conference (CSICC), ITRC, February 2005.

100) A. Javadtalab, A. Patooghy, S. G. Miremadi, M.O. Yeganeh, "Distributed Voting to Increase Fault-Tolerance in TMR, " the 10th CSI Computer Conference (CSICC), ITRC, February 2005 [in Persian].

101) S. G. Miremadi, M. J. Kargar, "Fault Injection-based Behavioral Analysis of 8085 Microprocessor and Comparison with Z80 and MC6809", the 10th CSI Computer Conference (CSICC), ITRC, February 2005 [in Persian].

102) H. Salmani, S. G. Miremadi, "Assessment of Message Missing Failures in CAN-based Systems", the IASTED International Conference on Parallel and Distributed Computing And Networks (PDCN), Innsbruck, Austria, February 2005.

103) H. Beitollahi, S. G. Miremadi, "Performance Evaluation of Fault-Tolerant Scheduling Algorithms in Real-Time Multiprocessor Systems", the IASTED International Conference on Parallel and Distributed Computing And Networks (PDCN), Innsbruck, Austria, February 2005.

104) S. Timarchi, S. G. Miremadi, A. Ejlali, " Evaluation of Some Exponential Random Number Generators Implemented by FPGA" the IASTED International Conference on Parallel and Distributed Computing And Networks (PDCN), Innsbruck, Austria, February 2005.

105) H. Beitollahi, S. G. Miremadi, "Partitioning scheduling algorithms in real-time multiprocessor systems", 9th world Multiconfernce on Systemics, Cybernetics and Informatics (WMSCI 2005).

106) H. R. Zarandi, S. G. Miremadi, "Fault Tree Analysis of Embedded Systems Using SystemC", the 51st Annual Reliability and Maintainability Symposium, (RAMS), Alexandria, USA, January 2005.

107) H. R. Zarandi, S. G. Miremadi, "A Highly Fault Detectable Cache Architecture for Dependable Computing", the International Conference of Computer Safety, Reliability and Security (SAFECOMP), Lecture Notes in Computer Science (LNCS), Potsdam, Germany, September 2004.

108) A. Rajabzadeh, S. G. Miremadi, and M. Mohandespour, "Experimental Evaluation of a Fault Tolerant System", the 10th IEEE International On-Line Testing Symposium (IOLTS), Madeira Island, Portugal, July 2004, pp. 239-244.

109) H. R. Zarandi, S. G. Miremadi, S. Hessabi, and A. Ejlali, "A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models, " the International Conference on Embedded Systems and Applications (ESA), USA, June 2004.

110) H. R. Zarandi, S. G. Miremadi, and H. Sarbazi-Azad, "Fault Detection Enhancement in Cache Memories Using a High Performance Placement Algorithm", the 10th IEEE International On-Line Testing Symposium (IOLTS), Madeira Island, Portugal, July 2004, pp. 101-106.

111) M. H. Valavi, S. G. Miremadi , "Reliability Evaluation Using Fault Trees Based on Monte Carlo Simulation", the International Conference on Modeling, Simulation and Visualization Methods (MSV), USA, June 2004, pp. 477-480.

112) A. Rajabzadeh, S. G. Miremadi, "Enhanced Committed Instruction Counting (ECIC): A Scheme for Error Detection Enhancement in COTS Processors", the IEEE-TTTC International Conference on Automation, Quality & Testing, Robotics (AQTR), Romania, May 2004, pp. 291-296.

113) G. Asadi and S. G. Miremadi, "Co-Verification of Partially Synthesizable Models", the 13th IEEE International North Atlantic Test Workshop (NATW), Essex Junction, VT, May 2004.

114) G. Asadi, S. G. Miremadi, H. R. Zarandi, and A. R. Ejlali, "Evaluation of Fault-Tolerant Designs Implemented on SRAM-Based FPGAs", the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC), Papeete, Tahiti, French Polynesia, 3-5 March 2004, pp. 327-332.

115) A. Rajabzadeh, M. Mohandespour, and S. G. Miremadi, "Error Detection Enhancement in COTS Superscalar Processors with Event Monitoring Features", the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC), Papeete, Tahiti, French Polynesia, 3-5 March 2004.

116) A. Rajabzadeh, M. Mohandespour, and S. G. Miremadi, "Evaluation of a Dependable Architecture", the 9th CSI Computer Conference (CSICC), Sharif University of Technology, 17-19 February 2004.

117) G. Asadi, G. Miremadi, H. R. Zarandi, and A. R. Ejlali, "Fault Injection into SRAM-Based FPGAs for the Analysis of SEU Effects", the IEEE International Conference on Field programmable Technology (FPT), Tokyo, Japan, December 2003, pp.428-430.

118) G. Miremadi and A. R. Ejlali, "Switch-Level Fault Emulation", International Conference on Field Programmable Logic and Application (FPL), Lecture Notes in Computer Science (LNCS), Lisbon, Portugal, September 2003.

119) A. R. Ejlali, G. Miremadi, H. R. Zarandi, G. Asadi and S. B. Sarmadi, "A Hybrid Fault Injection Approach Based on Simulation and Emulation Co-operation", the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), San Francisco, USA, June 2003. pp. 479-488.

120) A. R. Ejlali and G. Miremadi, "Switch-Level Emulation", the 40th ACM/IEEE Design Automation Conference (DAC), Anaheim, USA, June 2003, pp. 644-649.

121) A. R. Ejlali and G. Miremadi, "Time to Failure Tree", the 49th Annual Reliability and Maintainability Symposium, (RAMS), Florida, USA, January 2003, pp. 148-152.

122) G. Miremadi, S. B. Sarmadi and G. Asadi, "Speedup Analysis in Simulation-Emulation Co-Operation", the IEEE International Conference on Field programmable Technology (FPT), Hong Kong, December 2002, pp. 394-398.

123) G. Asadi, G. Miremadi, S.B. Sarmadi and A. R. Ejlali, "Speeding up Design Verification Using Co-Operation of Simulation and Emulation", the IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (AQTR), pp. 283-288, Cluj-Napoca, Romania, May 2002.