Publications

 

Journal papers

  1. Monazzah, A. M. H., Farbeh, H., and Miremadi, S. G., "LER: Least Error Rate Replacement Algorithm for Emerging STT-RAM Caches," IEEE Transactions on Device and Materials Reliability (TDMR'16), May 2016.

  2. Farbeh, H., Kim, H., Miremadi, S. G., and Kim, S., "Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of Non-Volatile Caches," IEEE Transactions on Computers (TC'16), April 2016.

  3. Farbeh, H., Mirzadeh, N. S., Ghalaty, N. F., Miremadi, S. G., Fazeli, M., and Asadi, H., "A Cache-Assisted ScratchPad Memory for Multiple Bit Error Correction," IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI'16), April 2016.

  4. Shirmohammadi, Z., Miremadi, S. G., "On Designing an Efficient Numerical-based Forbidden Pattern Free Crosstalk Avoidance Codec for Reliable Data Transfer of NoCs,"  to appear in Journal of Microelectronics Reliability, 2016. 

  5. Alinezhad Chamazcoti, S., Delavari, Z., Miremadi, S. G.  and Asadi, H., "On Endurance and Performance of Erasure Codes in SSD-based Storage Systems," Elsevier Journal of Microelectronics Reliability, Vol. 55, No. 11, pp. 2453-2467, November 2015.

  6. Delshadtehrani, L., Farbeh, H. , and  Miremadi, S. G., "In-Scratchpad Memory Replication: Protecting Scratchpad Memories in Multi-Core Embedded Systems against Soft Errors,"  ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 20, No. 4, pp. 61:1-61:28, September 2015.

  7. Rezaei, S., Miremadi, S. G, Asadi, H., Fazeli, M., "Soft error estimation and mitigation of digital circuits by characterizing input patterns of logic gates," Elsevier Journal of Microelectronics Reliability, No. 54, pp. 1412-1420, 2014.

  8. Ebrahimi, M., Mohammadi, A., Ejlali, A., S., Miremadi, "A fast, flexible, and easy-to-develop FPGA-based fault injection technique," Elsevier Journal of Microelectronics Reliability, No. 54, pp. 1412-1420, 2014.

  9. Ebrahimi, M., Miremadi, S. G., Asadi, H., Fazeli, M., "A Low Cost Scan Chain-Based Technique to Recover Multiple Errors in TMR Systems," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 21, No. 8, pp. 1454-1467, August 2013.

  10. Ghaderi, Z., Miremadi, S. G., Asadi, H., Fazeli, M., "HAFTA: Highly Available Fault-Tolerant Architecture to Protect SRAM-Based Reconfigurable Devices Against Multiple Bit Upsets," IEEE Transactions on Device and Materials Reliability (TDMR), Vol. 13, No. 1, pp. 203-212, March 2013.

  11. Patooghi, A., Miremadi, S. G., "Complement routing: A methodology to design reliable routing algorithm for Network on Chips," Elsevier Journal of Microprocessors and Microsystems, No. 34, pp. 163-173, 2013.

  12. Fazeli, M., Namazi, A., Miremadi, S. G., Haghdoost,  A., ''Operand Width Aware Hardware Reuse: A Low Cost Approach to Resilient ALU Design in Embedded Processors,'' Elsevier Journal of Microelectronics Reliability, Vol. 51, NO. 12, pp. 2374-2387, December 2011.

  13. Sedaghat, Y., Miremadi, S. G., "An FSM-Based Monitoring Technique to Differentiate Between Follow-up and Original Errors in Safety-Critical Distributed Embedded Systems," Elsevier Journal of Microelectronic Engineering, Vol. 42, NO. 6, pp. 863-873, April 2011.

  14. Sedaghat, Y., Miremadi, S. G., "Classification of Activated Faults in the FlexRay-Based Networks," Springer Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 26, NO. 5, pp. 535-547, October 2010.

  15. Patooghy, A., Miremadi, S. G., "Complement Routing: A Methodology to Design Reliable Routing Algorithm for Network on Chips," Elsevier Journal of Microprocessors and Microsystems, Vol. 34, NO. 6,  pp. 163-173, October 2010.

  16. Patooghy, A., Miremadi, S. G., Fazeli, M., "A Low-Overhead & Reliable Switch Architecture for Network-on-Chips," Elsevier Journal of Integration The VLSI, Vol. 43, NO. 3, pp. 268-278, June 2010.

  17. Fazeli, M., Namazi, A., Miremadi, S. G., "Robust Register Caching: An Energy Efficient Circuit Level Technique to Protect Register File in Embedded Processors," IEEE Transaction on Device and Material Reliability (TDMR), Vol. 10, NO. 2, pp. 208-221, June 2010.

  18. Ejlali, A., Al-Hashimi, B. M., Rosinger, P., Miremadi, S. G., Benini, L., "Performability/Energy Trade-off in Error-Control Schemes for On-Chip Networks," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 18, NO. 1, pp. 1-14, January 2010.

  19. Fazeli, M., Miremadi, S. G., Ejlali, A., Patooghy, A., "A Low Energy SEU/SET-Tolerant Latch for Deep Sub Micron Technologies," IET (IEE) Journal of Computers & Digital Techniques, Vol. 3, NO. 3, pp. 289-303, May 2009.

  20. Ejlali, A., Miremadi, S. G., "Error Propagation Analysis Using FPGA-based SEU-Fault Injection," Elsevier Journal of Microelectronic Engineering, Vol. 48, NO. 2, pp. 319-328, February 2008.

  21. Fazeli, M., Farivar,  R., Miremadi, S. G., "Error Detection Enhancement in PowerPC Architecture-based Embedded Processors," Springer Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 24, NO. 1-3, pp. 21-33, January 2008.

  22. Zarandi,  H. R., Miremadi, S. G., "Hierarchical Set-Associative Cache for High-Performance and Low-Energy Applications," World Scientific Journal of Computers, Systems and Circuits (JCSC), Vol. 15, NO. 6, December 2006.

  23. Ejlali, A., Miremadi, S. G., "Emulating Switch-Level Models of CMOS Circuits," Elsevier Journal of Microelectronic Engineering, Vol. 84, NO. 2, pp. 204-212, February 2007.

  24. Asadi, G., Miremadi, S. G., Ejlali, A., "Fast Co-Verification of HDL Models," Elsevier Journal of Microelectronic Engineering, Vol. 84, NO. 2, pp. 218-228, February 2007.

  25. Zarandi, H. R., Miremadi, S. G., "A SEU-Protected Cache Memory Based on Variable Associativity of Sets," Elsevier Journal of Reliability Engineering and System Safety, Vol. 92, NO. 11, pp. 1584-1596, November 2007.

  26.  Zarandi, H. R., Miremadi,  S. G., "Dependability Evaluation of Altera FPGA-based Embedded Systems Subjected to SEUs," Elsevier Journal of Microelectronics and Reliability, Vol. 47, NO. 2-3, pp. 461-470, March 2007.

  27. Rajabzadeh, A., Miremadi, S. G., "CFCET: A Hardware-Based Control Flow Checking Technique in COTS Processors Using Execution Tracing," Elsevier Journal of Microelectronics and Reliability, Vol. 46, NO. 5-6, pp. 959-972, May-June 2006.

  28. Ejlali, A., Al-Hashimi, B. M., Schmitz, M., Rosinger, P., Miremadi, S. G., "Combined Time and Information Redundancy for SEU-Tolerance in Energy-Efficient Real-Time Systems," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 14, NO. 4, pp. 323-335, April 2006.

  29. Zarandi, H. R., Miremadi, S. G., "A Fault-Tolerant Cache Architecture based on Binary Set Partitioning," Elsevier Journal of Microelectronics Reliability, Vol. 46, NO. 1, pp. 86-99, January 2006.

  30. Rajabzadeh, A., Miremadi, S. G., "Transient Detection in COTS Processor Using Software Approach," Elsevier Journal of Microelectronics Reliability, Vol. 46, NO. 1, pp. 124-133, January 2005.

  31. Rajabzadeh, A., Miremadi, S. G., Mohandespour, M., "Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features," Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 20, NO. 5, pp. 553-567, October 2004.

  32. Ejlali, A., Miremadi, S. G., "FPGA-Based Fault Injection into Switch-Level Models," Elsevier Journal of Microprocessors and Microsystems, Vol. 28, NO. 5-6, pp. 317-327, August 2004.

  33. Ejlali, A., Miremadi, S. G., "FPGA-based Monte Carlo Simulation for Fault Tree Analysis," Elsevier Journal of Microelectronics Reliability, Vol. 44, NO. 6, pp. 1017-1028, June 2004.

 

Conference papers

  1. Cheshmikhani, E., Monazzah, A. M. H., Farbeh, H., and Miremadi, S. G., "Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches," to appear in the proceedings of 11th IEEE International European Dependable Computing Conference (EDCC'16), Gothenburg, Sweden, September 2016.

  2. Shirmohammadi, Z., Rohbani, N., Miremadi, S. G., "3D-DPS: An Efficient 3D-CAC for Reliable Data Transfer in 3D ICs," to appear in the proceedings of 11th IEEE
    International European Dependable Computing Conference (EDCC'16)
    , Gothenburg, Sweden, September 2016.

  3. Shirmohammadi, Z., Miremadi, S. G., Allivand, Y., Mozafari, F., "OmPe-Fibo: An Efficient Forbidden Pattern Free CAC Design for NoCs," to appear in the proceedings of
    the 14th IEEE International Conference on Dependable, Autonomic and Secure Computing (DASC'16),
    Auckland, New Zealand, August 2016.

  4. Mahdavi. Z, Shirmohammadi, Z., Miremadi, S. G.,"ACM: an Accurate Crosstalk Modeling to Predict Channel Delay in Network-on-Chips," to appear in  the proceedings of the IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS'16), Catalunya, Spain, July 2016.

  5. Baharvand, F., and S. G. Miremadi, "ARMOR: Adaptive Reliability Management by On-the-Fly Redundancy in Multicore Embedded Processors," in the proceedings of the 21st IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), pp. 215-224, Zhangjiajie, China, November 2015.

  6. Shirmohammadi, Z., Miremadi, S. G., "Addressing NoC Reliability Through an Efficient Fibonacci-Based Crosstalk Avoidance Codec Design," in the proceedings of the 15th IEEE International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2015), pp. 756-770, Zhangjiajie, China, November 2015.

  7. Nazari, R., Rohbani, N., Farbeh, H., Shirmohammadi, Z., and Miremadi, S.G., "A2CM2: Aging-Aware Cache Memory Management Technique," in  the  proceedings of the 1st CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST'15), pp. 1-8, Tehran, Iran, October 2015.

  8. Zabihi, M., Farbeh, H., and Miremadi, S.G, "A Partial Task Replication Algorithm for Fault-Tolerant FPGA-based Soft-Multiprocessors," in  the proceedings of the 1st CSI Symposium on Real-Time and Embedded Systems and Technologies (RTEST'15), pp. 1-7, Tehran, Iran, October 2015.

  9. Shirmohammadi, Z., Ansari, M., Kazemian Abhari, S., Safari, S., Miremadi, S. G., "PAM: a Packet Manipulation Mechanism for Mitigating the Crosstalk Faults in NoCs," in the proceedings of The 13th IEEE International Conference on Dependable, Autonomic and Secure Computing (DASC-2015),pp. 1895-1902, Liverpool, England, October 2015.

  10. Ghaemi, S. G., Monazzah, A. M. H., Farbeh, H., and  Miremadi, S.G., "LATED: Lifetime-Aware Tag for Enduring Design," in the proceedings of the 11th IEEE International European Dependable Computing Conference (EDCC'15),pp. 97-107, Paris, France, September  2015.

  11. Shirmohammadi, Z., Miremadi, S. G., "S2AP: An Efficient Numerical-based Crosstalk Avoidance Code for Reliable Data Transfer of NoCs," in the  proceedings of the10th IEEE International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC '15), pp. 1-6, Bremen, Germany, July 2015.

  12. Hezaveh, M. Shirmohammadi, Z., Rohbani, N.,  Miremadi, S. G. "A Fault-Tolerant and Energy-Aware Mechanism for Cluster-based Routing Algorithm of WSNs", in the proceedings of the IFIP/IEEE Symposium on Integrated Network and Service Management (IM '15), pp. 659-664, Ottawa, Canada,  May 2015.

  13. Alinezhad, S, Miremadi, S. G., "EA-EO: Endurance Aware Erasure Code for SSD-based Storage Systems," in the proceedings of  IEEE Pacific Rim International Symposium on Dependable Computing (PRDC' 14), pp. 76-85, Singapore, November  2014.

  14. Makrani, H. M., Monazzah, A. M. H., Farbeh, H., Miremadi, S. G., "Evaluation of Software-Based Fault-Tolerant Techniques on Embedded OS's Components", in the proceedings of the IEEE International Conference on Dependability (DEPEND'14), pp. 51-57, Lisbon, Portugal, November 2014.

  15. Sayadi, H., Farbeh, H., Monazzah, A. M. H., Miremadi, S. G., "A Data Recomputation Approach for Reliability Improvement of Scratchpad Memory in Embedded Systems," in the proceedings of the IEEE Proceedings of the International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT'2014), pp. 227-232, Amsterdam, Netherlands, October 2014.

  16. Farbeh, H., Miremadi, S. G., "PSP-CACHE: A Low-cost Fault-tolerant Cache Memory Architecture,"  in the proceedings of the IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE'14), pp. 1-4, Dresden, Germany, March 2014.

  17. Ghazaani, E. A., Ghaderi, Z., Miremadi, S. G., "A Non-intrusive Portable Fault Injection Framework to Assess Reliability of FPGA-based Designs," in the proceedings of the IEEE International Conference on Field Programmable Technology (FPT'13), pp. 398-401, Kyoto, Japan, December 2013.

  18. Shirmohammadi, Z., Miremadi, S. G., "Crosstalk Avoidance Coding for Reliable Data Transmission of Network on Chips," in the proceedings of the 15th International Symposium on System-on-Chip 2013 (SoC'13), pp. 1-4, Tampere, Finland, October 2013.

  19. Alinezhad, S., Miremadi, S. G., Asadi, H., "On Endurance of Erasure Codes in SSD-based Storage Systems," in the proceedings of  the 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS'13), pp. 67-72, Tehran, Iran, October 2013.

  20. Shirmohammadi, Z., Miremadi, S. G., "Using Binary-Reflected Gray Coding for Crosstalk Mitigation of Network on Chip," in the proceedings of the 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS'13), pp. 81-86, Tehran, Iran, October 2013.

  21. Hosseini-Monazzah, A. M., Farbeh, H., Miremadi, S. G., Fazeli, M., Asadi, H., " FTSPM: A Fault-Tolerant ScratchPad Memory," in the proceedings of the 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'13), pp. 1-10, Budapest, Hungary, June 2013.

  22. Farbeh, H., Fazeli, M., Khosravi, F., Miremadi, S. G., "Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors," in the proceedings of the 9th European Dependable Computing Conference (EDCC'12), pp. 218-226, Sibiu, Romania, May 2012.

  23. Ahmadian, S. N., Fazeli, M., Farhadi, N., Miremadi, S. G., "Value Aware Low Power Register File Architecture," in the proceedings of the 16th Symposium on Computer Architecture and Digital Systems (CADS'12), Shiraz, Iran, May 2012 (Best Paper Award).

  24. Abazari, M. A., Fazeli, M., Patooghy, A., Miremadi, S. G., "An Efficient Technique to Tolerate MBU Faults in Register File of Embedded Processors," in the proceedings of  the 16th Symposium on Computer Architecture and Digital Systems (CADS'12), Shiraz, Iran, May 2012.

  25. Mohammadi, A., Ebrahimi, M., Ejlali, A., Miremadi, S. G., " SCFIT: A FPGA-based Fault Injection Technique for SEU Fault Model," in the proceedings of the Design, Automation and Test in Europe Conference (DATE'12), pp. 586-589, Dresden, Germany, March 2012.

  26. Farhady-Ghalaty, N., Fazeli, M., IzadyRad, H., Miremadi, S. G., "Software-Based Control Flow Error Detection and Correction Using Branch Triplication," in the proceedings of  the 17th IEEE International On-Line Testing Symposium (IOLTS'11), pp. 214-217, Athens, Greece, July 2011.

  27. Shafaei, M., Patooghy, A., Miremadi, S. G., "Crosstalk Avoidance in NoC Channels Using Numeral-Based Data Coding," in the proceedings of the 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC'11), pp. 55-62, Hong Kong, China, October 2011.

  28. Khosravi, F., Farbeh, H., Fazeli, M., Miremadi, S. G., "Low Cost Concurrent Error Detection for On-Chip Memory Based Embedded Processors," in the proceedings of  the 9th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC'11), pp. 114-119, Melbourne, Australia, October 2011. 

  29. Shafaei, M., Patooghy, A., Miremadi, S. G., "Numeral-based Crosstalk Avoidance Coding to Reliable NoC Design," in the proceedings of the 14th Euromicro Conference on Digital System Design (DSD'11), pp. 55-62, Oulu, Finland, August-September 2011.

  30. Sedaghat, Y., Jalali, Z., Miremadi, S. G., "A Fault Tolerance Study for the Central Bus Guardian in the FlexRay Protocol," in the proceedings of  the 20th IEEE International Symposium on Industrial Electronics (ISIE'11), Gdansk, Poland, June 2011.

  31. Ebrahimi, M., Miremadi, S. G., Asadi, H., "ScTMR: A Scan Chain-Based Error Recovery Technique for TMR Systems in Safety-Critical Applications," in the proceedings of  the IEEE/ACM International Conference on Design Automation and Test in Europe (DATE'11), pp. 1-4, Grenoble, France, March 2011.

  32. Fazeli, M., Ahmadian, S. N., Miremadi, S. G., Asadi, H., Tahoori, M. B., "Soft Error Rate Estimation of Digital Circuits in the Presence of Multiple Event Transients (METs)," in the proceedings of  the IEEE/ACM International Conference on Design Automation and Test in Europe (DATE'11), pp. 1-6, Grenoble, France, March 2011.

  33. Ahmadyan, S. N., Miremadi, S. G., "Fault Injection in Mixed-Signal Environment Using Behavioral Fault Modeling in Verilog-A,"  in the proceedings of  the IEEE International Behavioral Modeling and Simulation Conference (BMAS'10), pp. 69-74, San-Diego, CA, USA, September 2010.

  34. Patooghy, A., Shafaei, M., Miremadi, S. G., Falahati H., Taheri S., "FiRot: An Efficient Crosstalk Mitigation Method for Network-on-Chips," in the proceedings of  the 16th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC'10), pp. 55-61, Tokyo, Japan, December 2010.

  35. Patooghy, A., Miremadi, S. G., Shafaei, M., "Crosstalk Modeling to Predict Channel Delay in Network-on-Chips," in the proceedings of the 28th IEEE International Conference on Computer Design (ICCD'10), pp. 396-401, Amsterdam, the Netherlands, October 2010.

  36. Shirmohammadi, Z., Jalal, M., Patooghy, A., Miremadi, S. G., "A Reconfigurable Switch Architecture to Enhance Reliability of Network-on-Chips," in the proceedings of  the International Conference on Real-Time and Embedded Systems (RTES'10), Singapore, November 2010.

  37. Jalal, M., Shirmohammadi, Z., Patooghy, A., Miremadi, S. G., "Evaluation of Application Mapping for Network-on-Chips," in the proceedings of  the International Conference on Real-Time and Embedded Systems (RTES'10), Singapore, November 2010.

  38. Fazeli, M., Miremadi, S. G., Asadi, H., Ahmadian, S. N., "A Fast and Accurate Multi-Cycle Soft Error Rate Estimation Approach to Resilient Embedded Systems Design," in the proceedings of the 40th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'10), pp. 131-140, Chicago, IL, USA, June-July 2010.

  39. Patooghy, A., Tabkhi, H., Miremadi, S. G., "An Efficient Method to Reliable Data Transmission in Network-on-Chips," in the proceedings of the 13th Euromicro Conference on Digital System Design (DSD'10), pp. 467-474, Lille, France, September 2010.

  40. Fazeli, M., Miremadi, S. G., Asadi, H., Baradaran Tahoori, M., "A Fast Analytical Approach to Multi-Cycle Soft Error Rate Estimation of Sequential Circuits," in the proceedings of the 13th Euromicro Conference on Digital System Design (DSD'10), pp. 797-800, Lille, France, September 2010.

  41. Patooghy, A., Tabkhi, H., Miremadi, S. G., "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips," in the proceedings of the 3rd International Conference on Dependability (DEPEND'10), pp. 112-117, Venice, Italy, July 2010.

  42. Bashiri, M., Miremadi, S. G., "Performability Comparison of Schedulability Conditions in Real-Time Embedded Systems," in the proceedings of the 3rd International Conference on Dependability (DEPEND'10), pp. 70-75, Venice, Italy, July 2010.

  43. Bashiri, M., Miremadi, S. G., "Investigating the Effects of Schedulability Conditions on the Power Efficiency of Task Scheduling in an Embedded System," in the proceedings of the 13th IEEE International Symposium on Object/component/service-oriented Real-time distributed computing (ISORC'10), pp. 102-106, Carmona, Sevilla, Spain, May 2010.

  44. Sedaghat, Y., Miremadi, S. G., "A Low-Cost On-Line Monitoring Mechanism for the FlexRay Communication Protocol," in the proceedings of the 4th Latin-American Symposium on Dependable Computing (LADC), pp. 111-118, Joao Pessoa, Brazil, September 2009.

  45. Namazi, A., Miremadi, S. G., Ejlali, A. "A High Speed and Low Cost Error Correction Technique for the Carry Select Adder," in the proceedings of the 4th IEEE International Conference on Availability, Reliability and Security (ARES'09), pp. 635-640, Fukuoka, Japan, March 2009.

  46. Fazeli, M., Namazi, A., Miremadi, S. G., "An Energy Efficient Circuit Level Technique to protect Register File from MBUs and SETs in Embedded Processors," in the proceedings of  the 39th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'09), pp. 195-204, Lisbon, Portugal, June-July 2009.

  47. Razmkhah, M. H., Miremadi, S. G., Ejlali,A., Fazeli, M., "A Novel SET/SEU Hardened Parallel I/O Port," in the proceedings of  the IEEE Circuits and Systems International Conference on Testing and Diagnosis (ICTD'09), pp. 1-4, Chengdu, Sichuan China, April 2009.

  48. Ghasemzadeh, H., Miremadi, S. G., Ejlali, A., "Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors," in the proceedings of the 15th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'09), Shanghai, China, November 2009.

  49. Patooghy, A., Miremadi, S. G., "Reliability & Performance Modeling to Speed-Up the NoC Design," in the proceedings of the 15th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'09), pp. 1-6, Shanghai, China, November 2009.

  50. Namazi, A., Sedaghat, Y., Miremadi, S. G., Ejlali, A., "A Low-Cost Fault-Tolerant Technique for Carry Look-Ahead Adder,"  in the proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS'09), Sesimbra-Lisbon, Portugal, June 2009.

  51. Sedaghat, Y., Miremadi, S. G., "Categorizing and Analysis of Activated Faults in the FlexRay Communication Controller Registers," in the proceedings of the 14th European Test Symposium (ETS'09), pp. 121-126, Seville, Spain, May 2009.

  52. Sedaghat, Y., Jalali, Z., Jamalifar, H., Miremadi, S. G., Ejlali, A., "Fault Tolerance Analysis and Evaluation of Central Bus Guardian in the FlexRay Communication Protocol Used in Modern Automotive Electronic Control Systems," in the proceedings of the 2nd Annual International Conference on Automotive Electronics Industry (AEC'09), Tehran, Iran, February  2009.

  53. Shekarian, S. H. M., Ejlali, A., Miremadi, S. G, "Low Power Error Detection Mechanisms for Automotive Applications," in the proceedings of the 2nd Annual International Conference on Automotive Electronics Industry (AEC'09), Tehran, Iran, February 2009.

  54. Manoochehri, M., Ejlali, A., Miremadi, S. G, "Joint Write Policy and Fault-Tolerance Mechanism Selection for Caches in DSM Technologies: Energy-Reliability Trade-off," in the proceedings of the International Symposium on Quality Electronic Design (ISQED'09), pp. 839-844, March  2009.

  55. Manoochehri, M., Ejlali, A., Miremadi, S. G., "Fault Tolerant and Low Energy Write-Back Heterogeneous Set Associative Cache for DSM Technologies," in the proceedings of the 4th IEEE International Conference on Availability, Reliability and Security (ARES'09), pp. 448-453, March 2009.

  56. Razmkhah, M. H., Miremadi, S. G., Ejlali, A., "A Micro-FT-UART for Safety-Critical SoC-Based Applications," in the proceedings of the 4th International Conference on Availability, Reliability and Security (ARES'09), pp. 316-321, Fukuoka, Japan, March 2009.

  57. Patooghy, A, Miremadi, S. G., "XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip," in the proceedings of the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP'09), pp. 245-251, Weimar, Germany, January 2009.

  58. Ghasemzadeh, H., Tabkhi, H., Miremadi, S. G., Ejlali, A., "A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic," in the proceedings of the 20th International Conference on Microelectronics (ICM'08), Sharjeh, UMA, pp. 470-473, December 2008.

  59. Patooghy, A., Miremadi, S. G., "A Low-Overhead and Reliable Routing Algorithm for Network on Chips," in the proceedings of the International SoC Design Conference (ISOCC'08), pp. I-129-I-133, Busan, Korea, November 2008.

  60. Fazeli, M., Miremadi, S. G., Patooghy, A., "The Interplay of Reliability and Power Consumption in Design of SEU-Tolerant Latches for DSM Technology," in the proceedings of the 6th IEEE East-West Design & Test Symposium (EWDTS'08), Lviv, Ukraine, October 2008.

  61. Fazeli, M., Patooghy, A., Miremadi, S. G., "Evaluation of a Concurrent Error Detection Technique Using Power Supply Disturbance Fault Injection", in the proceedings of the 6th IEEE East-West Design & Test Symposium (EWDTS'08), Lviv, Ukraine, October 2008.

  62. Fazeli, M., Ahmadian, S. N., Miremadi, S. G., "A Low Energy Soft Error-Tolerant Register File Architecture for Embedded Processors," in the proceedings of the 11th IEEE High Assurance Systems Engineering Symposium (HASE'08), pp. 109-116, Nanjing, China, December 2008.

  63. Shekarian, S. M. H., Ejlali, A.,  Miremadi, S. G., "A Low Power Error Detection Technique for Floating-Point Units in Embedded Applications," in the proceedings of the IEEE/IFIP International Conference on  Embedded and Ubiquitous Computing (EUC'08), Vol. 1, pp. 199-205, December  2008.

  64. Jafari-Nodoushan, M., Miremadi, S. G., Ejlali, A., "Control-Flow Checking Using Branch Instructions," in the proceedings of the International Conference on Embedded and Ubiquitous Computing (EUC'08), pp. 66-72, Shanghai, China, December  2008.

  65. Tabkhi, H., Miremadi, S. G., Ejlali, A., "An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors," in the proceedings 23rd of the IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems (DFTVS'08), pp. 445-453, Boston, MA, USA, October 2008.

  66. Fazeli, M., Miremadi, S. G., "A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SETs," in the proceedings of the 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTVS'08), pp. 193-201, Boston, MA, USA, October 2008.

  67. Sedaghat, Y., Miremadi, S. G., "Investigation and Reduction of Fault Sensitivity in the FlexRay Communication Controller Registers," in the proceedings of the 27th International Conference on Computer Safety, Reliability and Security (SAFECOMP'08), pp. 153-166, Newcastle upon Tyne, UK, September 2008.

  68. Mehdizadeh, N., Shokrolah-Shirazi, M., Miremadi, S. G., "Analyzing Fault Effects in 32-bit OpenRISC 1200 Microprocessor," in the proceedings of the 3rd International Conference on Availability, Reliability and Security (ARES'08), pp. 648-652, Barcelona, Spain, March 2008.

  69. Farazmand, N., Fazeli, M., Miremadi, S. G., "FEDC: Control Flow Error Detection and Correction for Embedded Systems without Program Interruption," in the proceedings of the 3rd International Conference on Availability, Reliability and Security (ARES'08), pp. 33-38, Barcelona, Spain, March 2008.

  70. Dehbashi, M., Lari, V., Miremadi, S. G., Shokrolah-Shirazi, M., "Fault Effects in FlexRay-Based Networks with Hybrid Topology," in the proceedings of the 3rd International Conference on Availability, Reliability and Security (ARES'08), pp. 491-496, Barcelona, Spain, March 2008.

  71. Amiri-Kamalabad, M., Miremadi, S. G., Fazeli, M., "A Power Efficient Approach to Fault-Tolerant Register File Design," in the proceedings of the 21st IEEE International Conference on VLSI Design (VLSID'08), pp. 21-26, Hyderabad, India, January 2008.

  72. Shokrolah-Shirazi, M., Mahdizadeh, N., Miremadi, S. G., "FPGA-based Fault Injection into Synthesizable Verilog HDL Models," in the proceedings of the 2nd IEEE International Conference on Secure System Integration and Reliability Improvement (SSIRI'08), pp. 143-149, Yokohama, Japan, July 2008.

  73. Patooghy, A., Fazeli, M., Miremadi, S. G., "A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips," in the proceedings of the 13th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'07), pp. 264-267, Melbourne, Australia, December 2007.

  74. Lari, V., Dehbashi, M., Miremadi, S. G., Farazmand, N., "Assessment of Message Missing Failures in FlexRay-Based Networks," in the proceedings of the 13th IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'07), pp. 191-194, Melbourne, Australia, December 2007.

  75. Lari, V., Dehbashi, M., Miremadi, S. G., Amiri, M., "Evaluation of Babbling Idiot Failures in FlexRay-Based Networks," in the proceedings of the 7th IFAC/IEEE International Conference on Fieldbuses & Networks in Industrial & Embedded Systems (FET'07), pp. 399-406, Toulouse, France, November 2007.

  76. Patooghy, A., Fazeli, M., Miremadi, S. G., "Reducing Power Consumption in NoC Design with no Effect on Performance and Reliability," in the proceedings of the 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS'07), pp. 886-889, Marrakech, December 2007.

  77. Mirzaaghatabar, M., Jafarpour, B., Miremadi, S. G., Pedram, P., Ajorlou, J., "FTARM: Fault Tolerant Asynchronous RISC Microprocessor Using Watchdog Module," in the proceedings of the 5th IEEE East-West Design & Test Symposium (EWDTS'07), pp. 217-223, Yerevan, Armenia, September 2007.

  78. Fazeli, M., Patooghy, A., Miremadi, S. G., Ejlali, A., "Feedback Redundancy: A Power-Aware SEU-Tolerant Latch Design in DSM Technologies," in the proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07), pp. 276-285, Edinburg, UK, June 2007.

  79. Zarandi, H. R., Argyrides, C., Pradhan, D. K., "Multiple SEU Tolerance in LUTs of FPGAs Using Protected Schemes," in the proceedings of the IEEE European Conference on Radiation and Its Effects on Components and Systems (RADECS'08), pp. 325-330, Jyvaskyla, Finland, September 2008.

  80. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Mathew, J., "Soft Error Mitigation in Switch Modules of SRAM-based FPGAs," in the proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'07), pp. 141-144, New Orleans, LA, USA, May 2007.

  81. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Mathew, J., "CAD-Directed SEU Susceptibility Reduction in FPGA Circuit Designs," in the proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'07), New Orleans, LA, USA, May 2007.

  82. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Argyrides, C., "CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs," in the proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'07), pp. 3696-3699, New Orleans, LA, USA, May 2007.

  83. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Argyrides, C. "Exploiting Unused Routing Resources of Switch Modules to Tolerate SEUs in SRAM-based FPGAs," in the proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'07), New Orleans, LA, USA, May 2007.

  84. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Mathew, J., "SEU-Mitigation Placement and Routing Algorithms and Their Impact in SRAM-based FPGAs," in the proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED'07), pp. 380-385, San Jose, CA, USA, March 2007.

  85. Zarandi, H. R., Miremadi, S. G., Pradhan, D. K., Argyrides, C., "Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs," in the proceedings of the IEEE International Parallel and Distributed Processing Symposium (IPDPS'07), pp. 1-6, Long Beach, CA, USA, March 2007.

  86. Amini, N., Fazeli, M., Miremadi, S. G., Manzuri, M. T., "Distance-Based Segmentation: An Energy-Efficient Clustering Hierarchy for Wireless Microsensor Networks," in the proceedings of the 5th Annual Conference on Communication Networks and Services Research (CNSR'07), pp. 18-25, Fredericton, NB, Canada, May 2007.

  87. Amini, N., Fazeli, M., Miremadi, S. G., "A Hierarchical Routing Protocol for Energy Load Balancing in Wireless Sensor Networks," in the proceedings of  the 20th  Annual Canadian Conference on Electrical and Computer Engineering (CCECE'07), pp. 1086-1089, Vancouver, BC, Canada, April 2007.

  88. Shaad Zolpirani, M., Bidmeshki, M. M., Miremadi, S. G., "The Effect of Routing-Update Time on Networks Performability," in the proceedings of  the Annual Conference on Computer Systems and Applications (AICCSA'07), pp. 655-658, Amman, Jordan, May 2007.

  89. Ejlali, A., Al-Hashimi, B. M., Rosinger, P., Miremadi, S. G., "Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in On-Chip Networks," in the proceedings of  the Annual Conference on IEEE/ACM Design, Automation, and Test in Europe Conference (DATE'07), pp. 1-6, Nice, France, April 2007.

  90. Beitollahi, H., Miremadi, S. G., Deconinck, G., "Fault-Tolerant Earliest-Deadline-First Scheduling Algorithm," in the proceedings of  the IEEE International Parallel & Distributed Processing Symposium (IPDPS'07), pp. 1-6, long Beach, CA, USA, March 2007.

  91. Mirzaaghatabar, M., Miremadi, S. G., Pedram, H., "Fault Tolerance in a RISC Asynchronous Processor Using Flow Graph Checking," in the proceedings of the 12th Annual Conference on Computer Society of Iran (CSI'07), Tehran, Iran, 2007.

  92. Shaad Zolpirani, M., Bidmeshkii, M. M., Miremadi, S. G., "Improving the Performability of Networks Using Parallel Processing," in the proceedings of the 6th Annual IEEE International Conference on Networking (ICN'07), pp. 40, Martinique, French Caribbean, April 2007.

  93. Vahdatpourr, A., Fazeli, M., Miremadi, S. G., "Experimental Evaluation of Three Concurrent Error Detection Mechanisms," in the proceedings of the 18th Annual IEEE International Conference on Microelectronics (ICM'06), pp. 67-70, Dhahran, Saudi Arabia, December 2006.

  94. Bashiri, M., Fazeli, M,. Miremadi, S. G., "A Checkpointing Technique for Rollback Error Recovery in Embedded Systems," in the proceedings of the 18th Annual IEEE International Conference on Microelectronics (ICM'06), pp. 174-177, Dhahran, Saudi Arabia, December 2006.

  95. Bidmeshki, M. M., Shaad Zolpirani, M., Miremadi, S. G., "Performability Estimation of Network Services in the Presence of Component Failure," in the proceedings of the 2nd Annual International Conference on Telecommunications and Networking (TeNe'06), pp. 323-328, Springer, the Netherlands, December 2006.

  96. Kefayati, M., Rabiee, H. R., Miremadi, S. G., Khonsari, A., "Misbehavior Resilient Multi-path Data Transmission in Mobile Ad-hoc Networks," in the proceedings of the 4th Annual ACM Workshop on Security of Ad Hoc and Sensor Networks, pp. 91-100, New York, NY, USA, October 2006.

  97. Sedaghat, Y., Hessabi, S., Miremadi, S. G., "A Flood-Based Routing Algorithm to Increase the Performance of NoCs," in the proceedings of the 11th Annual International CSI Computer Conference (CSICC'06), Tehran, Iran, January 2006. (In Persian).

  98. Sedaghat, Y., Hessabi, S., Miremadi, S. G., Shaad Zolpirani, M., "A Method to Improve the Performability of NOC Using Dual Source-Router Conjunction," in the proceedings of the 11th International CSI Computer Conference (CSICC'06), Tehran, Iran, January 2006. (In Persian).

  99. Modarressi, M., Javan-Hemmat, H., Miremadi, S.G., Hessabi, S., Najafvand, M., Goudarzi, M., Mohamadzade, M., "A Fault-Tolerant Approach to Embedded System Design Using Software Standby Sparing," in the proceedings of the 11th Annual International CSI Computer Conference (CSICC'06), Tehran, Iran, January 2006. (In Persian)

  100. Vahdatpour, A., Fazeli, M., Miremadi, S. G., "Transient Error Detection in Embedded Systems Using Reconfigurable Components," in the proceedings of the Annual IEEE Symposium on Industrial Embedded Systems (IES'06), pp. 1-6, Antibes Juan-Les-Pins, France, October 2006.

  101. Sedaghat, Y., Miremadi, S. G., Fazeli, M., "A Software-based Error Detection Technique Using Encoded Signatures," in the proceedings of the 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'06), pp. 389-400, Arlington, Washington DC, USA, October 2006.

  102. Patooghy, A., Miremadi, S. G., Javadtalab, A., Fazeli, M., Farazmand, N., "A Solution to Single Point of Failure Using Voter Replication and Disagreement Detection," in the proceedings of the 2nd IEEE International Symposium on Dependable, Autonomic and Secure Computing (DASC'06), Indianapolis, IN, USA, September-October 2006.

  103. Aliari-Zonouz, S., Miremadi, S. G., "A Fuzzy-Monte Carlo Simulation Approach for Fault Tree Analysis," in the proceedings of the 52nd Annual Reliability and Maintainability Symposium  (RAMS'06), pp. 428-423, Newport Beach, CA, USA, January 2006.

  104. Miremadi, S. S., Fazeli, M., Patooghy, A., Miremadi, S. G., "Performance Evaluation of a Routing Protocol for Wireless Sensor Networks," in the proceedings of the 3rd Annual IEEE/IFIP International Conference on Wireless and Optical Communications Networks (WOCN'06), pp. 1-5,  Bangalore, India, April 2006.

  105. Fazeli, M., Farivar R., Miremadi, S. G., "A Software-Based Concurrent Error Detection Technique for PowerPC Processor-based Embedded Systems," in the proceedings of the Annual IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05), pp. 266-274, Monterey, CA, USA, October 2005.

  106. Fazeli, M. Farivar, R., Hessabi, S., Miremadi, S. G., "A Fault Tolerant Approach to Object Oriented Design and Synthesis of Embedded Systems," in the proceedings of the Annual Latin-American Symposium on Dependable Computing (LADC'05), pp. 143-153, Salvador, Brazil, October 2005.

  107. Bakhoda, A., Miremadi, S. G., Zarandi, H. R., "Investigation of Transient Effects on FPGA-based Embedded Systems," in Proceeding of  the 2nd Annual International Conference on Embedded Software and Systems (ICESS'05), pp. 6pp, Xian, China, December 2005.

  108. Bakhoda, A., Miremadi, S. G., Zarandi, H. R., "Experimental Evaluation of Transient Effects on SRAM-based FPGA Chips," in the proceedings of the 17th Annual IEEE International Conference on Microelectronics (ICM'05), pp. 251-255, Islamabad, Pakistan, December 2005.

  109. Salmani, H., Miremadi, S. G., "Contribution of Controller Area Networks Controller to Masquerade Failures," in the proceedings of the Annual IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'05), Changsha, Hunan, China, December 2005.

  110. Rajabzadeh, A., Miremadi, S. G., "A Hardware Approach to Concurrent Error Detection Capability Enhancement in COTS Processors," in the proceedings of the 11th Annual IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'05), Changsha, Hunan, China, December 2005.

  111. Zarandi, H. R., Miremadi, S. G., "Soft Error Mitigation in Cache Memories of Embedded Systems By Means of a Protected Scheme," in the proceedings of  the 2nd Latin-American Symposium on Dependable Computing (LADC'05), pp. 121-130, Salvador, Brazil, October 2005.

  112. Farivar, R., Fazeli, M., Miremadi, S. G., "Directed Flooding: A Fault-Tolerant Routing Protocol for Wireless Sensor Networks," in the proceedings of the System Communications, Montreal, Que., Canada, August 2005.

  113. Ejlali, A., Schmitz, M., Al-Hashimi, B. M., Miremadi, S. G., Rosinger, P., "Energy Efficient SEU-Tolerance in DVS-Enabled Real-Time Systems through Information Redundancy," in the proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'05), pp. 281-286, San Diego, CA, USA, August 2005.

  114. Ejlali, A., Al-Hashimi, B. M.,  Miremadi, S. G.,  "Fast Observation Architecture for FPGA-Based SEU Analysis," in the proceedings of the 10th European Test Symposium (ETS'05), pp. 233-238, Tallinn, Estonia, May 2005

  115. Miremadi, S. G., Zarandi, H. R., "Reliability of Protecting Techniques Used in Fault-Tolerant Cache Memories," in the proceedings of  the 18th IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE'05), pp. 820-823, Saskatoon, Sask., Canada, May 2005.

  116. Zarandi, H. R.Miremadi, S. G., "Hierarchical Multiple Associative Mapping in Cache Memories," in the proceedings of  the 12th IEEE International Conference on Engineering of Computer-Based Systems (ECBS'05), pp. 95-101, Greenbelt, MD, USA, April 2005.

  117. Beitollahi, H., Miremadi, S. G., "A Fault Tolerant Static Scheduling Algorithm for Real-Time Multiprocessor Systems," in the proceedings of  the 13th International Conference on Real-Time Systems, Paris, France, April 2005.

  118. Beitollahi, H., Miremadi, S. G., Habibi, J., "Performance Evaluation of Fault-Tolerant Scheduling Algorithms in Real-Time Multiprocessor Systems," in the proceedings of  the 10th CSI Computer Conference (CSICC'05), ITRC, February 2005.

  119. Timarchi, S., Miremadi, S. G., Ejlali, A., "Analysis of Some Random Number Generators with Exponential Density Distribution Function," in the proceedings of  the 10th CSI Computer Conference (CSICC'05), ITRC, February 2005 [in Persian].

  120. Timarchi, S., Miremadi, S. G., Ejlali, A., "A Comparative Evaluation of Some Hardware-Based Pseudo-Random Number Generators," in the proceedings of  the 10th CSI Computer Conference (CSICC'05), ITRC, February 2005.

  121. Javadtalab, A., Patooghy, A., Miremadi, S. G., Yeganeh, M. O., "Distributed Voting to Increase Fault-Tolerance in TMR," in the proceedings of  the 10th CSI Computer Conference (CSICC'05), ITRC, February 2005 [in Persian].

  122. Miremadi, S. G., Kargar, M. J., "Fault Injection-Based Behavioral Analysis of 8085 Microprocessor and Comparison with Z80 and MC6809," in the proceedings of  the 10th CSI Computer Conference (CSICC'05), ITRC, February 2005 [in Persian].

  123. Salmani, H., Miremadi, S. G., "Assessment of Message Missing Failures in CAN-Based Systems," in the proceedings of  the IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN'05), pp. 387-392, Innsbruck, Austria, February 2005.

  124. Timarchi, S., Miremadi, S. G., Ejlali, A., "Evaluation of Some Exponential Random Number Generators Implemented by FPGA," in the proceedings of  the IASTED International Conference on Parallel and Distributed Computing And Networks (PDCN'05), pp. 578-583, Innsbruck, Austria, February 2005.

  125. Beitollahi, H., Miremadi, S. G., "Partitioning Scheduling Algorithms in Real-Time Multiprocessor Systems," in the proceedings of the 9th World Multiconfernce on Systemics Cybernetics and Informatics (WMSCI'05), Orlando, FL, USA, July 2005.

  126. Zarandi, H. R., Miremadi, S. G., "Fault Tree Analysis of Embedded Systems Using SystemC", in the proceedings of  the 51st Annual Reliability and Maintainability Symposium (RAMS'05), pp. 77-81, Alexandria, VA, USA, January 2005.

  127. Zarandi, H. R., Miremadi, S. G., "A Highly Fault Detectable Cache Architecture for Dependable Computing," in the proceedings of  the International Conference of Computer Safety, Reliability and Security (SAFECOMP'04), Lecture Notes in Computer Science (LNCS'04), pp. 45-59, Potsdam, Germany, September 2004.

  128. Rajabzadeh, A., Miremadi, S. G., Mohandespour, M. "Experimental Evaluation of a Fault Tolerant System," in the proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS'04), pp. 239-244, Madeira Island, Portugal, July 2004.

  129. Zarandi, H. R., Miremadi, S. G., Hessabi, S., Ejlali, A., "A Mixed-Mode Simulation-Based Environment to Test and Dependability Assessment of HDL Models," in the proceedings of  the International Conference on Embedded Systems and Applications (ESA'04), pp. 582-588, Las Vegas, NV, USA, June 2004.

  130. Zarandi, H. R., Miremadi, S. G., Sarbazi-Azad, H., "Fault Detection Enhancement in Cache Memories Using a High Performance Placement Algorithm," in the proceedings of  the 10th IEEE International On-Line Testing Symposium (IOLTS'04), pp. 101-106, Madeira Island, Portugal, July 2004.

  131. Valavi, M. H., Miremadi, S. G., "Reliability Evaluation Using Fault Trees Based on Monte Carlo Simulation," in the proceedings of  the International Conference on Modeling, Simulation and Visualization Methods (MSV'04), pp. 477-480, Las Vegas, NV, USA, June 2004.

  132. Rajabzadeh, A., Miremadi, S. G., "Enhanced Committed Instruction Counting (ECIC): A Scheme for Error Detection Enhancement in COTS Processors," in the proceedings of  the IEEE-TTTC International Conference on Automation, Quality & Testing, Robotics (AQTR'04), pp. 291-296, Romania, May 2004.

  133. Asadi, G., Miremadi, S. G., "Co-Verification of Partially Synthesizable Models," in the proceedings of  the 13th IEEE International North Atlantic Test Workshop (NATW'04), pp. 71-78, Essex Junction, VT, USA, May 2004.

  134. Asadi, G., Miremadi, S. G., Zarandi, H. R., Ejlali, A. R. "Evaluation of Fault-Tolerant Designs Implemented on SRAM-Based FPGAs," in the proceedings of  the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'04), pp. 327-332, Papeete, Tahiti, French Polynesia, March 2004.

  135. Rajabzadeh, A.Mohandespour, M., Miremadi, S. G., "Error Detection Enhancement in COTS Superscalar Processors with Event Monitoring Features,"  in the proceedings of  the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC'04), pp. 49-54, Papeete, Tahiti, French Polynesia, March 2004.

  136. Rajabzadeh, A., Mohandespour, M., Miremadi, S. G., "Evaluation of a Dependable Architecture,"  in the proceedings of  the 9th CSI Computer Conference (CSICC'04), pp. 249-254, Tehran, Iran, February 2004.

  137. Asadi, G., Miremadi, S. G., Zarandi, H. R.Ejlali, A. R., "Fault Injection into SRAM-Based FPGAs for the Analysis of SEU Effects,"  in the proceedings of  the IEEE International Conference on Field programmable Technology (FPT'03), pp. 428-430, Tokyo, Japan, December 2003.

  138. Miremadi, S. G., Ejlali, A. R., "Switch-Level Fault Emulation," in the proceedings of  the 13th International Conference on Field Programmable Logic and Application (FPL'03), Lecture Notes in Computer Science (LNCS'03), pp. 849-858, Lisbon, Portugal, September 2003.

  139. Ejlali, A. R., Miremadi, S. G., Zarandi, H. R., Asadi, G.Sarmadi, S. B., "A Hybrid Fault Injection Approach Based on Simulation and Emulation Co-operation," in the proceedings of  the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'03), pp. 479-488, San Francisco, CA, USA, June 2003.

  140. Ejlali, A. R., Miremadi, G., "Switch-Level Emulation," in the proceedings of the 40th ACM/IEEE Design Automation Conference (DAC'03), pp. 644-649, Anaheim, CA, USA, June 2003.

  141. Ejlali, A. R., Miremadi, S. G., "Time to Failure Tree,"  in the proceedings of  the 49th Annual Reliability and Maintainability Symposium (RAMS'03), pp. 148-152, Tampa, FL, USA, January 2003.

  142. Miremadi, S. G., Sarmadi, S. B.Asadi, G., "Speedup Analysis in Simulation-Emulation Co-Operation," in the proceedings of  the IEEE International Conference on Field programmable Technology (FPT'02), pp. 394-398, Hong Kong, China, December 2002.

  143. Asadi, G., Miremadi, S. G., Sarmadi, S. B., Ejlali, A. R., "Speeding up Design Verification Using Co-Operation of Simulation and Emulation,"  in the proceedings of  the IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (AQTR'02), pp. 283-288, Cluj-Napoca, Romania, May 2002.